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Jie Zhou (PhD. Student) - Jie is committed to exploring the application of Large Language Models (LLMs) in the realm of Hardware Description Languages (HDLs) with a focus on automating the generation and debugging processes.
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Yunpeng Zhu (Master Student) - Yunpeng researches instruction analysis coprocessors (shadow stack, address sanitiser, etc.) and architectural support and hardware/software co-design for scalar processors. Future work may expand to superscalar processors, additional analysis modules, and parallel coprocessors.
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Wei Tang (Master Student) - Wei focuses on the collaborative development of safety-critical SoC chips with RISC-V architecture, with responsibilities including writing and optimizing microarchitecture code. Wei also designs and verifies inspection hardware units between the main and slave cores, aiming to correct detected errors and further optimize chip units.
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Dean You (Master Student) - Dean's research intereasts are around architectural techniques for: data prefetching for irregular memory access patterns in hardware, run-time hardware support for processor security and reliability, and fine-grained preemptive techiniques for NPUs.
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Dingrong Pan (Hardware Engineer) - Dingrong is a Hardware verification engineer. She has worked on IP level verification for large Soc chips. Currently working on our project of LLM-based hardware design and verfication, with a focus on verification and debugging.
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Renshuang Jiang (PhD. student) -
(Cosupervised with Pan Dong@NUDT) RenShuang works on modular operating system architecture design, including flexible isolation and refactoring systems. She previously worked on projects related to enhancing the safety of the Rust programming language and is also interested in using Rust to rewrite OSes.
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Tinglue Wang (Master Student) - Tinglue studied at the School of Electronic Science and Engineering, SEU for four years during his undergraduate studies. Tinglue is interested in SoCs/CPUs architecture design and digital circuit design, and is working on a safety-critical multi-core CPU architecture design project based on Berkeley chipyard platform.
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Hui Wang (Master Student) - Hui's research interests are around MLSys. He is dedicated to achieving Efficient ML through the study of machine learning algorithms and software/hardwore infrastructure. Here is Hui's github: https://github.com/shirohasuki.
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Youshu Ji (Software Engineer) - Youshu is a software enginer, currently working on our project of LLM-based agile hardware design and verfication. Here is Youshu's github: https://github.com/lvzii.